From: Marcus Sundberg <mackan@stacken.kth.se>
  To  : ggi-develop@eskimo.com
  Date: 03 Nov 1999 20:31:17 +0100

Re: gicon and low-level I/O

Jos Hulzink <josh@stack.nl> writes:

> On 2 Nov 1999, Marcus Sundberg wrote:
> 
> > Basicly you never want to cache anything that sits on the other side
> > of the PCI-bus. MTRR write combining should always be turned on for
> > memory, but never for registers. That's about it.
> > AGP is ofcourse another story...
>
> Eh.. Enabling MTRR write combining for the videomemory of some chips
> causes crashes. Yes it's me again with my outdated ViRGE :)

Why am I not surprised... ;)
But that's just one flag passed from the driver to the OS-layer, 
telling it that it shouldn't do any sort of burst accesses to video
memory. (I'm assuming that's what causes trouble with write combining).

> And I like to know your AGP story, for it seems S3 has managed to get a
> ViRGE listening to an AGP bus... (AGP0.0001X or something...)

Well, my AGP story is that I don't know much about it. ;)
But for the CPU accessing the AGP card AFAIK there's no difference
compared to PCI, except mayby the speed. If I have understood things
correctly the real difference is that an AGP card can access main RAM
in a really fast way.

//Marcus
-- 
-------------------------------+------------------------------------
        Marcus Sundberg        | http://www.stacken.kth.se/~mackan
 Royal Institute of Technology |       Phone: +46 707 295404
       Stockholm, Sweden       |   E-Mail: mackan@stacken.kth.se