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From: Martin Lexa <mlexa@atlas.cz>
To : ggi-develop@eskimo.com
Date: Mon, 02 Aug 1999 21:50:37 +0200
S3V accel CopyBox
Hi All!
I've done accel copybox so please look at it if you want.
Jos has made some update in cvs so accel copybox there may
work better may not.
to Jos: Could you send me list accel functions on which you
work and which are "free". May be I'll look at Mesa ...
Bye, Martin
[E-mail: mlexa@atlas.cz]
p.s.: The patch is against 2 - 3 days old snapshot so it'll
need some hacking to get it work.
diff -u --recursive --new-file kgicon.orig/kgi/accel/S3/virge.c kgicon/kgi/accel/S3/virge.c
--- kgicon.orig/kgi/accel/S3/virge.c Fri Jul 30 21:24:39 1999
+++ kgicon/kgi/accel/S3/virge.c Mon Aug 2 19:59:28 1999
@@ -23,6 +23,12 @@
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
+
+ This code was derived from the following source of information:
+ [1] S3 ViRGE Data Book, (c) August 1996 S3 Incorporated
+ [2] XFree86 S3 ViRGE accelerated support by Sebastien Marineau
+
+******************************************************************************
*/
#define MAINTAINER "Jos Hulzink, [josh@stack.nl]"
@@ -43,9 +49,17 @@
#define GET_CHIPSET_PRIVATE struct chipset_private *private=KGIM_PRIVATE(dpy,chipset)
#define MEM_ACCEL (((struct chipset_private*)(KGIM_PRIVATE(dpy,chipset)))->mem_accel)
-static kgiu32 csm; // command screen mode
-static kgiu8 bpp; // bits per pixel
+static kgiu32 csm; /* command screen mode */
+static kgiu8 bpp; /* bits per pixel */
static kgiu8 accel;
+static kgiu32 planemask; /* planemask */
+static kgiu8 bltbug; /* 1. width bug */
+static kgiu8 bltbug2; /* 2. width bug */
+static kgiu16 mode_width; /* mode width */
+static kgiu16 mode_height; /* mode height */
+static kgiu16 scissb; /* scissor */
+static kgiu32 accelcmd; /* accel command */
+
/*
** The ViRGE accelleration stuff
*/
@@ -67,12 +81,52 @@
}
*/
-inline static int ViRGE_copy_box (struct kgi_cbox *b,struct kgi_display *dpy) {
+/* Set some default values to GE registers */
+
+inline static void ViRGE_GE_Default(struct kgi_display *dpy)
+{
+ mem_out32 (((mode_width * bpp / 8) << 16) | (mode_width * bpp / 8),
+ MEM_ACCEL + 0xA4E4);
+ mem_out32 (0, MEM_ACCEL + 0xA4D4);
+ mem_out32 (0, MEM_ACCEL + 0xA4D8);
+ mem_out32 ((0 << 16) | mode_width, MEM_ACCEL + 0xA4DC);
+ mem_out32 ((0 << 16) | scissb, MEM_ACCEL + 0xA4E0);
+ mem_out32 (~0, MEM_ACCEL + 0xA4E8);
+ mem_out32 (~0, MEM_ACCEL + 0xA4EC);
+}
+
+inline static int ViRGE_copy_box (struct kgi_cbox *b, struct kgi_display *dpy)
+{
+ kgiu16 new_width;
+ kgiu32 cmd = accelcmd;
+
+
DEBUG1("ViRGE: Accellerated CopyBox");
- mem_out32 (b->h+((b->w-1)<<16),MEM_ACCEL+0xA504);
- mem_out32 ((((b->x>=b->x2)?b->x:b->x+b->w-1)<<16)+((b->y>=b->y2)?b->y:b->y+b->h-1),MEM_ACCEL+0xA508);
- mem_out32 ((((b->x>=b->x2)?b->x2:b->x2+b->w-1)<<16)+((b->y>=b->y2)?b->y2:b->y2+b->h-1),MEM_ACCEL+0xA50C);
- mem_out32 (0x01980020|csm|((b->x>=b->x2)?0x02000000:0)|((b->y>=b->y2)?0x04000000:0),MEM_ACCEL+0xA500);
+
+ if (b->x >= b->x2) cmd |= 0x02000000;
+ if (b->y >= b->y2) cmd |= 0x04000000;
+
+ cmd |= 0xcc << 17 | 0x01 | (0x0 << 27);
+
+ mem_out32 (planemask, MEM_ACCEL + 0xA4F4);
+ mem_out32 (cmd, MEM_ACCEL + 0xA500);
+ mem_out32 (~0, MEM_ACCEL + 0xA4E8);
+ mem_out32 (~0, MEM_ACCEL + 0xA4EC);
+
+ if (b->w >= bltbug && b->w <= bltbug2) new_width = bltbug2 + 1;
+ else new_width = b->w;
+
+ if(new_width != b->w) {
+ mem_out32 (cmd | 0x02, MEM_ACCEL + 0xA500);
+ mem_out32 ((b->x2 << 16) | (b->x2 + b->w - 1), MEM_ACCEL + 0xA4DC);
+ } else mem_out32 ((0 << 16) | mode_width, MEM_ACCEL + 0xA4DC);
+
+ mem_out32 (b->h | ((b->w - 1) << 16), MEM_ACCEL + 0xA504);
+ mem_out32 ((((cmd & 0x2000000) ? b->x : (b->x + new_width - 1)) << 16) |
+ ((cmd & 0x4000000) ? b->y : (b->y + b->h - 1)), MEM_ACCEL + 0xA508);
+ mem_out32 ((((cmd & 0x2000000) ? b->x2 : (b->x2 + new_width - 1)) << 16) |
+ ((cmd & 0x4000000) ? b->y2 : (b->y2 + b->h - 1)), MEM_ACCEL + 0xA50C);
+
return -EOK;
}
@@ -129,27 +183,39 @@
{
switch (mode->request.graphtype) {
case KGIGT_8BIT:
- csm=0;
- bpp=8;
- accel=1;
+ csm = 0;
+ bpp = 8;
+ accel = 1;
+ planemask = 0xff;
+ bltbug = 51;
+ bltbug2 = 64;
+ accelcmd = 0x0020 | csm;
break;
case KGIGT_15BIT:
case KGIGT_16BIT:
- csm=0x4;
- bpp=16;
+ csm = 0x4;
+ bpp = 16;
+ planemask = 0xffff;
+ bltbug = 26;
+ bltbug2 = 32;
+ accelcmd = 0x0020 | csm;
break;
case KGIGT_24BIT:
case KGIGT_32BIT:
- csm=0x8;
- bpp=24;
+ csm = 0x8;
+ bpp = 24;
+ planemask = 0xffffff;
+ bltbug = 16;
+ bltbug2 = 22;
+ accelcmd = 0x0020 | csm;
break;
default:
- csm=0;
- bpp=8;
+ csm = 0;
+ bpp = 8;
break;
}
- mode->fbcon_accel = FB_ACCEL_S3_VIRGE;
+/* mode->fbcon_accel = FB_ACCEL_S3_VIRGE; */
if (((mode->fb_size-mode->fsize-1024)>>1)>(mode->request.virt.x*mode->request.virt.y)) {
DEBUG1 ("ViRGE: Hardware 3D accelleration enabled.");
@@ -158,6 +224,12 @@
mem_out32 ((mode->fsize+7)&(~7),MEM_ACCEL+0xB4D4);
mem_out32 (mode->request.virt.x << 1, MEM_ACCEL+0xB0E8);
mem_out32 (mode->request.virt.x << 1, MEM_ACCEL+0xB4E8);
+ mode_width = mode->request.virt.x;
+ mode_height = mode->request.virt.y;
+ scissb = (dpy->card->chipset->ramsize * 1024 - 1024) /
+ (mode_width * bpp / 8);
+ if (scissb > 2047) scissb = 2047;
+ ViRGE_GE_Default(dpy);
} else {
DEBUG1 ("ViRGE: Hardware 3D accelleration disabled.");
}
@@ -177,19 +249,20 @@
case ACCEL_GETHLINE:
return -E(ACCEL, BOGUS);
case ACCEL_DRAWLINE:
- return ViRGE_draw_line ((struct kgi_line *)(gr->io_buf),gr->dev.dpy);
+/* return ViRGE_draw_line ((struct kgi_line *)(gr->io_buf),gr->dev.dpy);*/
case ACCEL_DRAWVLINE:
case ACCEL_PUTVLINE:
case ACCEL_GETVLINE:
return -E(ACCEL, BOGUS);
case ACCEL_DRAWBOX:
- DEBUG0 ("Drawbox !!");
- return EOK;
+/* DEBUG0 ("Drawbox !!");
+ return EOK;*/
case ACCEL_GETBOX:
case ACCEL_PUTBOX:
return -E(ACCEL, BOGUS);
case ACCEL_FILLSCREEN:
- return ViRGE_fill_screen (gr->dev.dpy);
+/* return ViRGE_fill_screen (gr->dev.dpy);*/
+ return -E(ACCEL, BOGUS);
case ACCEL_COPYBOX:
return ViRGE_copy_box ((struct kgi_cbox *)(gr->io_buf),gr->dev.dpy);
case ACCEL_DRAWCIRCLE:
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